In the semiconductor industry a number of manufacturing processes are typically used to produce electronic devices of an ever-decreasing size. Some manufacturing processes involve etching dielectric films using a mask layer. Generally, double patterning refers to a class of technologies for manufacturing integrated circuits (ICs), developed for photolithography to enhance the feature density. In the double patterning technology, the conventional lithography process is enhanced to produce double the expected number of features.
Currently, an amorphous carbon layer (“ACL”) is used as a hard mask for patterning, for example, shallow trench isolation, gate, bitline, contact, capacitor, interconnect, and other features for electronic devices. The ACL is also used as a hard mask for the double patterning integration into the lithography at 193 nanometers (“ArF lithography”). As device feature sizes are getting smaller, critical dimensions (“CDs”) become smaller and etch depth is getting greater. Accordingly, high ion energy are used to etch high aspect ratio features.
For high aspect ratio features of the electronic devices, the thickness of the ACL hard mask needs to be increased to withstand etch of the underlying layers. Increasing the thickness of the ACL, however, can create etching defects, for example striation, wiggling, or other defects of the etched features. Additionally, increasing the thickness of the ACL increases opacity of the mask. Increasing the opacity of the mask makes it difficult to align the mask to a wafer for lithography. Moreover, the double patterned masks, for example, an oxide mask on the ACL, tend to shrink and collapse during a reactive ion etch.